Challenges of Next-Generation Electronic Architectures in the SDV Era

Software has become the key to innovation and is transforming entire industries. While Software-Defined Vehicles (SDVs) unlock vast opportunities for innovation, customization, and differentiation, they also present complex challenges for E/E architectures:

Growing number of safety-critical, compute-intensive functions like Advanced Driver Assistance Systems (ADAS) and automated driving,
Need for high-performance and timing-predictable networking solutions to cope with the dramatic increase in bandwidth demand driven by the growing number of data-intensive sensors like cameras,
Consolidation of numerous “domain ECUs” into a few high-performance, multi-domain integration platforms with built-in redundancy,
Real-time vehicle-to-cloud communication and Over-the-Air (OTA) updates,
Scalable E/E architectures for safety and performance, tailored to different vehicle classes in a cost-effective way – as explored in this study by R. Bosch and Cognifyer, RTaW’s research lab,
Ensuring predictability in complex execution platforms with multiple OSes, an hypervisor, and service-oriented middleware running on SoCs with heterogeneous cores – see this study by Volvo Cars and Cognifyer.

Speed-up Design Exploration, Optimization and Validation of Next-Generation SDVs with RTaW-Pegase/SDV Platform

System Level Modelling, Configuration and Design-Space Exploration

Unified Modeling and Simulation for Networks and Software in a Single Platform

DDS- and SOME/IP-based Service Oriented Architectures

RTaW and RTI Partner to Deliver DDS & TSN Solutions for Mission-Critical Systems

Compare Design Options: Impact on Loads and Latencies of Periodic vs. Event-Triggered Activations

Further information in this case-study

Key Features

Enable the modelling software running on processors as tasks communicating via messages and signals, locally or over a communication network,
Support design decisions related to task allocation to processors and cores, scheduling policies, and task activation patterns,
Enable to model system-level timing chains (e.g., between sensors and actuators) across processors and networks within the embedded system,
Provide firm guarantees that processor loads remain within budget and task timing constraints are met,
Offer timing-accurate simulation and worst-case response time analysis for software functions, network transmissions, and sensor-to-actuator timing chains,
Enable proper buffer sizing to prevent message loss,
Support Service-Oriented Architectures (SOME/IP, DDS) and ensure services are consistently delivered on time,
Offer rich visualization tools (e.g., Gantt charts, load displays) to understand system timing behavior in both nominal and edge cases,
Quantify system extensibility in terms of spare processor capacity and the number of additional functions and services the architecture can support,
Explore SDV design options, enabling performance- and cost-driven design choices,
Support industry-standard file formats (e.g., Autosar .arxml) for seamless integration into the overall design flow,
Leverage Pegase’s networking modules for comprehensive system-level verification for distributed functions.

Testimonial

“The competition in the smart electric vehicle (EV) market necessitates the swift introduction of new features. This, in turn, demands a new generation of EEA (Electrical and Electronic Architecture) and communication technologies. The implementation of a brand-new tech stack results in challenges when addressing communication and task scheduling problems. RTaW’s SDV functionality enables us to model the temporal behavior of the vehicle and conduct insightful analysis of each activity chain. Throughout this process, the tool provides various scheduling models, state-of-the-art simulation algorithms, and, with RTaW’s robust support, assists us in identifying the traffic and CPU peaks of the system. Ultimately, it helps us pinpoint the appropriate solution. RTaW-Pegase plays a crucial role as a key tool in the development of next-generation EEA.”

ZhiQi LIU, Lead Architect, NIO